`timescale 1ns / 1ps

module Harz_M(
    input [4:0] M_A1,
    input [4:0] M_A2,
    input [1:0] M_Tu1,
    input [1:0] M_Tu2,
    input [4:0] W_A3,
    input W_RegWr,
    input [1:0] W_Tn,
    output M_FA1,
    output M_FA2
    );

    assign M_FA1 = (W_A3 == M_A1 && W_RegWr && M_A1);
    assign M_FA2 = (W_A3 == M_A2 && W_RegWr && M_A2);

endmodule
